In this section, I will cover and walk through the kernel code executed in interrupt context. I will be reffering the the code as per2.4.18 release of kernel.

__'''Low Level Interrupt Stubs'''__

Whenever an interrupt occurs, CPU performs the some [:KernelHacking-HOWTO/Overview of the Kernel Source Code/Internals of Interrupt Handling:hardware checks] and start executing the following assembly instructions inkernel, whose pointer (offest in kernel code segment) is storedcorrestonding IDT entry.

{{{
File: include/asm-i386/hw_irq.h

155 #define BUILD_COMMON_IRQ() 
156 asmlinkage void call_do_IRQ(void); 
157 __asm__( 
158 "\n" __ALIGN_STR"\n" 
159 "common_interrupt:\n\t" 
160 SAVE_ALL 
161 SYMBOL_NAME_STR(call_do_IRQ)":\n\t" 
162 "call " SYMBOL_NAME_STR(do_IRQ) "\n\t" 
163 "jmp ret_from_intr\n");


175 #define BUILD_IRQ(nr) 
176 asmlinkage void IRQ_NAME(nr); 
177 __asm__( 
178 "\n"__ALIGN_STR"\n" 
179 SYMBOL_NAME_STR(IRQ) #nr "_interrupt:\n\t" 
180 "pushl $"#nr"-256\n\t" 
181 "jmp common_interrupt");}}}

This macros is used at the kernel initialization time to write outthelowest interrupt stubs, which can be called from IDT by savingtheiroffsets (pointers) in IDT gates. Kernel maintains one global arrayoffunction pointers (name of array is "interrupt") in which it storesthepointer of these stubs. Code related to creation of these stubs(usingabove mentioned BUILD_IRQ macro) and saving their pointers intheglobal array "interrupt[NR_IRQS]" can be seen infile"arch/x86_64/kernel/i8259.c". In this file you will see the usageof BUILD_IRQ macro to create the interrupt stubs as follows:

{{{
File: arch/i386/kernel/i8259.c

40 #define BI(x,y) 
41 BUILD_IRQ(x##y)
42
43 #define BUILD_16_IRQS(x) 
44 BI(x,0) BI(x,1) BI(x,2) BI(x,3) 
45 BI(x,4) BI(x,5) BI(x,6) BI(x,7) 
46 BI(x,8) BI(x,9) BI(x,a) BI(x,b) 
47 BI(x,c) BI(x,d) BI(x,e) BI(x,f)
48
49 /*
50 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
51 * (these are usually mapped to vectors 0x20-0x2f)
52 */
53 BUILD_16_IRQS(0x0)
54
55 #ifdef CONFIG_X86_IO_APIC
56 /*
57 * The IO-APIC gives us many more interrupt sources. Most of these
58 * are unused but an SMP system is supposed to have enough memory ...
59 * sometimes (mostly wrt. hw bugs) we get corrupted vectors all
60 * across the spectrum, so we really want to be prepared to get all
61 * of these. Plus, more powerful systems might have more than 64
62 * IO-APIC registers.
63 *
64 * (these are usually mapped into the 0x30-0xff vector range)
65 */
66 BUILD_16_IRQS(0x1) BUILD_16_IRQS(0x2) BUILD_16_IRQS(0x3)
67 BUILD_16_IRQS(0x4) BUILD_16_IRQS(0x5) BUILD_16_IRQS(0x6) BUILD_16_IRQS(0x7)
68 BUILD_16_IRQS(0x8) BUILD_16_IRQS(0x9) BUILD_16_IRQS(0xa) BUILD_16_IRQS(0xb)
69 BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd)
70 #endif
71
72 #undef BUILD_16_IRQS
73 #undef BI
}}}

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